d-Matrix Unveils Game-Changing Raptor Accelerator Promising Unprecedented Memory Bandwidth

At Hot Chips 2026, Santa Clara's d-Matrix showcased its Raptor accelerator, achieving over 100 terabytes per second bandwidth at just 0.37 picojoules per bit. This innovative design uses vertical microbumps to eliminate the energy drain of traditional interposing methods. While Raptor offers significant efficiency gains, its 32-gigabyte capacity may pose limitations for large AI models. The technology, still in early silicon stages, aims to transform AI inference efficiency.